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Title: Development of an FPGA based photon counting detector
Authors: Ambily, S
Issue Date: Aug-2014
Publisher: Indian Institute of Astrophysics
Citation: M. Tech. Thesis, University of Calcutta, Calcutta
Abstract: The UV photon event rate is very low in the near space region and we need to have a very sensitive detector to discriminate between the noise and actual signal. Photon counting method is usually used to detect such weak signal, to utilize the characteristics that the output signal of photon detector is naturally discrete under the low light irradiation. Detectors requiring single event counting capabilities utilize readout methods where the electron cloud from the MCP is used to determine the event position and time. One of the crucial characteristics of event centroiding detectors is the time required to process an event. That time defines the counting rate capabilities of the detector. That represents the challenge to event centroiding readouts when a simultaneous detection of multiple events is required. Frame based readouts, allowing simultaneous detection of multiple events per single frame. The digital electronics of the CMOS readout system requires stringent specifications to meet the requisites of real-time operation: identification and centroiding of each photon event is to be completed before the occurrence of the successive photon event. As each CMOS frame is to be analysed and the presence of valid events searched. To achieve this task we need a FPGA (Field programmable Gate Array) based data acquisition and real-time processing system. The FPGA technology, while endowed with the high velocity performance of dedicated hardware, guarantees a good deal of flexibility: re-programmability of devices allows easy testing of different algorithms without modifying the external connections, thus maintaining unaltered system architecture. Project work is to develop a system with three basic units - a frame acquisition system to read CMOS chip continuously, an event identification and centroid generating unit and an output control unit to store and display the final data output continuously.
Description: Restricted Access
Thesis Supervisor Prof. Jayant Murthy
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Appears in Collections:Integrated M.Tech-Ph.D (Tech.)

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